BIONDI, ALESSANDRO
 Distribuzione geografica
Continente #
NA - Nord America 4.564
EU - Europa 3.000
AS - Asia 724
Continente sconosciuto - Info sul continente non disponibili 9
SA - Sud America 7
AF - Africa 5
OC - Oceania 3
Totale 8.312
Nazione #
US - Stati Uniti d'America 4.504
IT - Italia 999
GB - Regno Unito 620
CN - Cina 385
DE - Germania 351
UA - Ucraina 292
IE - Irlanda 180
VN - Vietnam 132
SE - Svezia 130
FR - Francia 84
FI - Finlandia 79
SG - Singapore 78
DK - Danimarca 76
PT - Portogallo 49
IN - India 43
ES - Italia 42
CA - Canada 41
AT - Austria 27
NL - Olanda 25
HK - Hong Kong 21
PK - Pakistan 21
MX - Messico 19
JP - Giappone 16
CH - Svizzera 15
IR - Iran 11
EU - Europa 9
BR - Brasile 7
GR - Grecia 6
LT - Lituania 6
BE - Belgio 5
KR - Corea 5
TR - Turchia 5
ET - Etiopia 4
LU - Lussemburgo 4
AU - Australia 3
BY - Bielorussia 2
HU - Ungheria 2
IL - Israele 2
PL - Polonia 2
TW - Taiwan 2
BD - Bangladesh 1
CZ - Repubblica Ceca 1
KW - Kuwait 1
LK - Sri Lanka 1
NO - Norvegia 1
RS - Serbia 1
SK - Slovacchia (Repubblica Slovacca) 1
ZM - Zambia 1
Totale 8.312
Città #
Chandler 616
Ashburn 469
Southend 376
Ann Arbor 310
Woodbridge 294
Houston 256
Fairfield 253
San Mateo 198
Pisa 190
Dublin 177
Jacksonville 163
Dearborn 153
Seattle 146
Cambridge 145
Beijing 131
Boardman 123
Wilmington 116
Falls Church 104
Milan 95
Stevenage 88
Fremont 86
Dongguan 74
Lawrence 74
Dong Ket 73
Brooklyn 69
Portsmouth 69
Rome 68
Helsinki 55
Buti 50
Washington 42
Las Vegas 40
Redwood City 37
Assago 33
Florence 30
Munich 30
Singapore 28
San Diego 27
London 25
Frankfurt am Main 23
Old Bridge 20
Shanghai 18
Ottawa 17
Varenna 17
Lund 16
Vienna 16
Nanjing 15
Barcelona 14
Hanover 13
Livorno 13
New York 13
Nuremberg 13
Redmond 13
Santa Clara 13
Serra 13
Genoa 12
Madrid 12
Toronto 12
Norwalk 11
Palermo 11
Palo Alto 10
Philadelphia 10
Naples 9
Padova 9
Zapopan 9
Duncan 8
Eindhoven 8
Pontedera 8
San Giorgio delle Pertiche 8
Shenyang 8
Guangzhou 7
Los Angeles 7
Macerata 7
San Giuliano Terme 7
Viareggio 7
Bangalore 6
Central 6
Changsha 6
Como 6
Gunzenhausen 6
Lucca 6
Massarosa 6
New Bedfont 6
Osaka 6
Trieste 6
Birmingham 5
Bochum 5
Hangzhou 5
Hefei 5
Islamabad 5
Lausanne 5
Massa 5
Minneapolis 5
Montréal 5
Mumbai 5
Naessjoe 5
Provo 5
San Jose 5
Segni 5
Torino 5
Turin 5
Totale 5.880
Nome #
Schedulability Analysis of Hierarchical Real-Time Systems under Shared Resources 433
ARTE: Arduino real-time extension for programming multitasking applications 216
Real-Time Analysis and Design of a Dual Protocol Support for Bluetooth LE Devices 163
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems 157
Constant bandwidth servers with constrained deadlines 156
A Framework for Supporting Real-Time Applications on Dynamic Reconfigurable FPGAs 156
Response time analysis for G-EDF and G-DM scheduling of sporadic DAG-tasks with arbitrary deadline 146
OSEK-Like Kernel Support for Engine Control Applications under EDF Scheduling 142
Moving from Single-Core to Multicore: Initial Findings on a Fuel Injection Case Study 141
Lightweight Real-Time Synchronization under P-EDF on Symmetric and Asymmetric Multiprocessors 141
Exact Interference of Adaptive Variable-Rate Tasks under Fixed-Priority Scheduling 140
Dual-protocol support for Bluetooth LE devices 139
Engine Control: Task Modeling and Analysis 138
Feasibility Analysis of Engine Control Tasks under EDF Scheduling 138
Is your bus arbiter really fair? Restoring fairness in axi interconnects for FPGA SOCs 138
Maximizing the Security Level of Real-Time Software While Preserving Temporal Constraints 131
Response-Time analysis for real-Time tasks in engine control applications 127
A Blocking Bound for Nested FIFO Spin Locks 125
A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration 122
Analyzing parallel real-time tasks implemented with thread pools 121
Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling 120
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs 119
Hierarchical scheduling of real-time tasks over Linux-based virtual machines 118
Performance-driven Design of Engine Control Tasks 117
Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures 117
Increasing the Confidence of Deep Neural Networks by Coverage Analysis 117
Resource reservation for real-time self-suspending tasks: Theory and Practice 114
Supporting Component-Based Development in Partitioned Multiprocessor Real-Time Systems 113
Hard Constant Bandwidth Server: Comprehensive formulation and critical scenarios 111
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone 111
Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions 108
Real-time analysis of engine control applications with speed estimation 106
Semi-Partitioned Scheduling of Dynamic Real-Time Workload: A Practical Approach Based on Analysis-Driven Load Balancing 102
Optimal Design for Reservation Servers under Shared Resources 101
Response-Time Analysis of Engine Control Applications under Fixed-Priority Scheduling 101
Selecting the Transition Speeds of Engine Control Tasks to Optimize the Performance 100
On the ineffectiveness of 1/m-based interference bounds in the analysis of global EDF and FIFO scheduling 97
Modeling and Analysis of Engine Control Tasks Under Dynamic Priority Scheduling 97
A design flow for supporting component-based software development in multiprocessor real-time systems 96
Simple and General Methods for Fixed-Priority Schedulability in Optimization Problems 96
Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC 94
Automating the design flow under dynamic partial reconfiguration for hardware-software co-design in FPGA SoC 93
Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms 89
The SRP Resource Sharing Protocol for Self-Suspending Tasks 89
Predictable Memory-CPU Co-Scheduling with Support for Latency-Sensitive Tasks 88
Timing-Aware FPGA partitioning for real-Time applications under dynamic partial reconfiguration 86
Timing isolation and improved scheduling of deep neural networks for real-time systems 85
A survey of schedulability analysis techniques for rate-dependent tasks 84
Optimized partitioning and priority assignment of real-time applications on heterogeneous platforms with hardware acceleration 84
Evaluating the Robustness of Semantic Segmentation for Autonomous Driving against Real-World Adversarial Patch Attacks 84
Beyond the weakly hard model: Measuring the performance cost of deadline misses 82
Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm 82
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms 80
Partitioning and interface synthesis in hierarchical multiprocessor real-time systems 79
A Holistic Memory Contention Analysis for Parallel Real-Time Tasks under Partitioned Scheduling 79
An I/O Virtualization Framework with I/O-Related Memory Contention Control for Real-Time Systems 77
A bandwidth reservation mechanism for axi-based hardware accelerators on FPGAs 73
AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC 71
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving 71
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms 71
Task Splitting and Load Balancing of Dynamic Real-Time Workloads for Semi-Partitioned EDF 70
Detecting Adversarial Examples by Input Transformations, Defense Perturbations, and Voting 68
A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration 68
Bounding Memory Access Times in Multi-Accelerator Architectures on FPGA SoCs 68
Scheduling Replica Voting in Fixed-Priority Real-Time Systems 67
The ampere project: A model-driven development framework for highly parallel and energy-efficient computation supporting multi-criteria optimization 64
Optimizing the Functional Deployment on Multicore Platforms with Logical Execution Time 63
Flora: Floorplan optimizer for reconfigurable areas in FPGAs 63
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems 62
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology 60
ARTe: Providing real-time multitasking to Arduino 57
On the Minimal Adversarial Perturbation for Deep Neural Networks With Provable Estimation Error 57
Event-driven delay-induced tasks: Model, analysis, and applications 56
Modeling and analysis of bus contention for hardware accelerators in FPGA SoCs 55
Replication-Based Scheduling of Parallel Real-Time Tasks 53
Analyzing Arm's MPAM From the Perspective of Time Predictability 51
Time-Predictable Acceleration of Deep Neural Networks on FPGA SoC Platforms 51
Optimal Memory Allocation and Scheduling for DMA Data Transfers under the LET Paradigm 46
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms 44
Optimizing Inter-Core Communications under the LET Paradigm using DMA Engines 42
Partitioning real-time workloads on multi-core virtual machines 42
X-BaD: A flexible tool for explanation-based bias detection 41
Response-Time Analysis for Self-Suspending Tasks Under EDF Scheduling 38
Robust-by-Design Classification via Unitary-Gradient Neural Networks 37
Defending from Physically-Realizable Adversarial Attacks through Internal Over-Activation Analysis 36
Integrating Online Safety-related Memory Tests in Multicore Real-Time Systems 33
On the Real-World Adversarial Robustness of Real-Time Semantic Segmentation Models for Autonomous Driving 31
Virtualized DDS Communication for Multi-Domain Systems: Architecture and Performance Evaluation of Design Alternatives 27
Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications 26
CARLA-GeAR: A Dataset Generator for a Systematic Evaluation of Adversarial Robustness of Deep Learning Vision Models 11
Attention-Based Real-Time Defenses for Physical Adversarial Attacks in Vision Applications 10
End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware 9
Totale 8.478
Categoria #
all - tutte 50.306
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 50.306


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020787 0 0 60 42 128 130 122 49 89 34 20 113
2020/20211.688 49 152 62 130 156 268 127 91 121 127 180 225
2021/20221.261 49 214 60 58 26 60 132 221 59 140 107 135
2022/20231.508 99 116 119 281 159 183 36 98 209 60 79 69
2023/20241.647 94 24 240 110 80 243 106 327 57 120 73 173
2024/2025403 295 108 0 0 0 0 0 0 0 0 0 0
Totale 8.478