The 5G revolution will shape the telecommunication ecosystem providing high bandwidth and low latency. Moreover, the advent of Network Function Virtualizations (NFVs) will require higher network flexibility to move functions to the edge. Many NFVs are dedicated to data processing at the edge, thus they can be defined as Processing Function Virtualizations (PFVs) that may be accelerated exploiting programmable hardware. This paper proposes a Field Programmable Gate Array (FPGA) pipeline for multi-service chain, enabling dynamic deployment and hardware resources management. Results show the effectiveness of the approach since the pipeline latency remains constant with different input aggregated throughput.

Hardware acceleration for Processing Function Virtualization

Civerchia F.;Sgambelluri A.;Paolucci F.;Maggiani L.;Castoldi P.;Cugini F.
2021-01-01

Abstract

The 5G revolution will shape the telecommunication ecosystem providing high bandwidth and low latency. Moreover, the advent of Network Function Virtualizations (NFVs) will require higher network flexibility to move functions to the edge. Many NFVs are dedicated to data processing at the edge, thus they can be defined as Processing Function Virtualizations (PFVs) that may be accelerated exploiting programmable hardware. This paper proposes a Field Programmable Gate Array (FPGA) pipeline for multi-service chain, enabling dynamic deployment and hardware resources management. Results show the effectiveness of the approach since the pipeline latency remains constant with different input aggregated throughput.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11382/572118
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